Date: 4 October
Hour: 1 p.m.
Venue: Room VA5, Civil Engineering Building, Alameda campus
«The Department of Computer Science and Engineering (DEI) and the Department of Electrical and Computer Engineering (DEEC) are pleased to announce the talk “Oscillator and Latch Ising Machines”, by Professor Jaijeet Roychowdhury (University of California, Berkeley), on 4 October, at 1 p.m., in room VA5.
Abstract:
For many real-world applications (ranging from large-scale networking and the design/verification of mission-critical systems to drug discovery and 5/6G wireless systems), modern society has become increasingly reliant on rapid and routine solution of hard discrete optimization problems.
Over the past decade, fascinating analog hardware approaches that combine principles of physics and computer science with optical, electronic and quantum engineering to solve combinatorial optimization problems in new ways—these have come to be known as Ising machines.
Such approaches leverage analog dynamics and physics to find good solutions of discrete optimization problems, potentially with advantages over traditional algorithms.
These approaches are based on the Ising model, a simple but powerful graph formulation with deep historical roots in physics using which combinatorial optimization problems can be represented. While the first Ising machines relied on quantum mechanical interactions, newer schemes have emerged that are based on purely classical (non-quantum) operational mechanisms. Classical Ising machine schemes that can be implemented on chip have many practical advantages—eg., smaller physical size, lower cost, lower energy consumption, on-chip integration, scaling to large problem sizes and mass production.
About seven years ago, we discovered that the analog dynamics of networks of electronic oscillators resulted in their solving Ising problems “naturally”. A few years later, schemes that use bistable latches in analog operation were also devised. This talk will cover the principles and practice of oscillator and latch Ising machines, touching on similarities and differences. Surprisingly, a common mathematical framework based on Lyapunov functions helps explain these machines’ remarkable optimization properties.
The design and implementation of practical integrated circuits with analog Ising cores that deliver proper optimization performance will also be touched upon.
Another key focus will be Ising machine performance on real-world applications.
Examples will include the MU-MIMO detection problem in modern wireless communications—we will show how it can be converted to Ising form, and how well it is solved by analog Ising machine schemes. Our results indicate that near-optimal symbol-error rates (SERs) are obtained, improving over the industrial state of the art by 20x for some scenarios.
Biography:
Jaijeet Roychowdhury is a Professor of EECS at the University of California at Berkeley.
He received a B.Tech degree in EE (IIT Kanpur, 1987) and a Ph.D. degree in EECS (Berkeley, 1993). From 1993 to 2000, he was with Bell Laboratories; from 2000 to 2001, with CeLight Inc., an optical networking startup; and from 2001-2008, with the University of Minnesota.
Contributions from his group include the concept of self-sustaining oscillators for Ising-based and von Neumann computation, novel machine-learning techniques for dynamical systems, theory and techniques for oscillator phase macromodels, injection locking and phase noise, multi-time partial differential equations and techniques for model reduction of time-varying and nonlinear systems.
Roychowdhury was cited for Extraordinary Achievement by Bell Laboratories in 1996 (for work on MOS homotopies) and shared the Bell Labs Prize (with his student Tianshi Wang, for work on oscillator Ising machines) in 2019. He has authored or co-authored eight best or distinguished papers.
Roychowdhury co-founded Berkeley Design Automation, a startup later acquired by Mentor Graphics. He is a Fellow of the IEEE.
